GIT-CERCS-05-20
Christopher R. Clark, David E. Schimmel,
A Unified Model of Pattern-Matching Circuit Architectures
There has been a significant volume of recent work on FPGA designs for
pattern matching. Although various pattern-matching architectures have
been presented, attempts to compare different designs have been
inconclusive, or even misleading, due to the lack of a common evaluation
framework. In this paper, we present an analytical model of FPGA
pattern-matching architectures that quanti-tatively expresses the
relationships between pattern properties, circuit area, and circuit
delay. We derive equations that show how the performance of each
architecture is dependent on the properties of the pattern set. This
model enables many different pattern-matching architectures to be
compared in order to determine the optimal design for a given
pattern-matching application.