GIT-CERCS-07-16
Mongkol Ekpanyapong, Pinar Korkmaz, Sung Kyu Lim,
ILP-based Supply and Threshold Voltage Assignment For Total Power Minimization
In this paper we present an ILP-based method to simultaneously assign supply and threshold voltages to individual gates for dynamic
and leakage power minimization. In our three-step approach, low power min-flipflop (FF) retiming is first performed to reduce the
clock period while taking the FF delay/power into consideration. Next, the subsequent voltage assignment formulated in ILP makes
the best possible supply/threshold voltage assignment under the given clock period constraint set by the retiming. Finally, a
post-process further refines the voltage assignment solution by exploiting the remaining timing slack in the circuit. Related
experiments show that the min-FF retiming plus simultaneous Vdd/Vth assignment approach outperforms the existing max-FF retiming
plus Vdd-only assignment approach.