High Performance Interconnects
for Distributed Computing

Call For Papers (PDF)


In conjunction with the 14th International Symposium on High Performance Distributed Computing (HPDC-14)

Research Triangle Park, NC, July 2005





Sandia National Laboratory

Intel Corporation



Karsten Schwan, Georgia Tech



Dhabaleswar K. Panda, Ohio State

Ada Gavrilovska, Georgia Tech



Ron Brightwell, Sandia National Labs

Wu-Chun Feng, Los Alamos National Lab

Jose Flich, Univ. Politecnica de Valencia

Alan D. George, Univ. of Florida

Larry Huston, Intel Research

Krishna Kant, Intel

Raj Krishnamurthy, IBM Research, Zurich

John Lockwood, Washington Univ. St. Louis

Arthur Maccabe, Univ. of New Mexico

Pankaj Mehra, HP

Scott Pakin, Los Alamos National Lab

Rolf Riesen, Sandia National Labs

Karsten Schwan, Georgia Tech

Sudhakar Yalamanchili, Georgia Tech

Mazin Yousif, Intel



Submission deadline: June 4, 2005

Notification of acceptance: June 24, 2005

Final Manuscript due: July 1, 2005

Workshop: July 24, 2005



Contact the Program Co-Chair

Ada Gavrilovska (ada@cc.gatech.edu)





The emergence of 10.0 GigE, InfiniBand, programmable NICs, network processors, and protocols like DDP and RDMA over IP, make it possible to create tightly linked systems across physical distances that exceed those of traditional single cluster or server systems. Further, these technologies can deliver communication capabilities that achieve the performance levels needed by high end applications in enterprise systems and like those produced by the high performance computing community.

The purpose of this workshop is to explore the confluence of WAN technologies with high performance interconnects, as applicable or applied to realistic high end applications. The intent is to create a venue that will act as a bridge between researchers developing tools and platforms for high-performance distributed computing, end user applications seeking high performance solutions, and technology providers aiming to improve interconnect and networking technologies for future systems. The hope is to foster knowledge creation and intellectual interchanges between HPC end users and technology developers in the specific domain of high performance interconnects.

Topics of interest include:

  • Hardware/software architectures for communication infrastructures for HPC
  • Data and control protocols for interactive and large data volume applications
  • Novel devices and technologies to enhance interconnect properties
  • Interconnect-level issues when extending high performance beyond single machines, including  architecture, protocols, services, QoS, and security
  • Remote storage (like iSCSI), remote databases, and datacenters, etc



HPI-DC invites authors to submit original and unpublished work. Please submit extended abstracts or full papers, not exceeding 8 single-column pages in 10 point font or larger. Electronic submission is strongly encouraged. Hard copies will be accepted only if electronic submission is not possible.  Submission implies the willingness of at least one of the authors to register and present the paper. Any questions concerning hardcopy submissions or any other issues may be directed to the Program Co-Chairs.



The workshop proceedings will be distributed at the conference.